Projects

Subband Digital Predistortion for 6G Millimeter-Wave Systems
Developed advanced DPD linearization techniques for mmW 6G transmitters within the French national Docte6G project, in collaboration with NXP Semiconductors.
Télécom Paris
FPGA-Based Digital Lock-In Amplifier with Signal Enhancement
Designed and verified an FPGA-based lock-in amplifier system with comprehensive noise analysis, published in IEEE Embedded Systems Letters and Sensors.
IEEE ESL Paper Sensors Review Paper
FPGA-Based LDPC Encoder/Decoder with UVM Verification
Designed and verified FPGA-based LDPC codec and AWGN channel module for 5G NR forward error correction, developed for SAGE Microelectronics.
SAGE Microelectronics
Spectral Optimization and DPD for 5G Massive MIMO Systems
Developed spectral modeling and digital predistortion algorithms for multi-antenna 5G systems, optimizing linearity and spectral efficiency under CONACyT research grant.
Sensors 2022 Paper ISCAS 2022 Paper CRC Press Book Chapter
Behavioral Modeling of Chireix Outphasing Power Amplifier
Measurement and behavioral modeling of dynamic efficiencies in a Chireix PA architecture at the RF Nonlinear Research Laboratory, The Ohio State University.
The Ohio State University