FPGA

A Low-Cost FPGA/SDR Testbed for Power Amplifier Characterization
An affordable software-defined-radio testbed built around an FPGA SoC and the AD9361 transceiver for measuring wideband power amplifier behavior and validating digital predistortion.
Last updated on May 20, 2026 3 min read
Published in Sensors (MDPI)
Field-Programmable Gate Array (FPGA)-Based Lock-In Amplifier System with Signal Enhancement: A Comprehensive Review on the Design for Advanced Measurement Applications
Jose Alejandro Galaviz-Aguilar, Cesar Vargas-Rosales, Francisco Falcone, Carlos Aguilar-Avelar
DOI
FPGA-Based Digital Lock-In Amplifier with Signal Enhancement
Designed and verified an FPGA-based lock-in amplifier system with comprehensive noise analysis, published in IEEE Embedded Systems Letters and Sensors.
Last updated on May 20, 2026 1 min read
IEEE ESL Paper Sensors Review Paper
FPGA-Based Digital Lock-In Amplifier with Signal Enhancement
Designed and verified an FPGA-based lock-in amplifier system with comprehensive noise analysis, published in IEEE Embedded Systems Letters and Sensors.
IEEE ESL Paper Sensors Review Paper
Reliable Methodology to FPGA Design Verification and Noise Analysis for Digital Lock-In Amplifiers
Jose Alejandro Galaviz-Aguilar, Cesar Vargas-Rosales, Francisco Falcone
DOI
FPGA-Based LDPC Encoder/Decoder with UVM Verification
Designed and verified FPGA-based LDPC codec and AWGN channel module for 5G NR forward error correction, developed for SAGE Microelectronics.
SAGE Microelectronics
FPGA-based system for effective IQ imbalance mitigation of RF power amplifiers
Jose Cruz Nunez-Perez, Sergio Alberto Juarez Cazares, Jose Alejandro Galaviz-Aguilar, Yuma Sandoval-Ibarra, Francisco Javier Perez Pinal, Esteban Tlelo-Cuautle
DOI
Comparison of a genetic programming approach with ANFIS for power amplifier behavioral modeling and FPGA implementation
Jose Alejandro Galaviz-Aguilar, Patrick Roblin, Jose Ricardo Cardenas-Valdez, Emigdio Z-Flores, Leonardo Trujillo, Jose Cruz Nunez-Perez, Oliver Schutze
DOI
FPGA Realisation of n-QAM Digital Modulators
Jose Alejandro Galaviz-Aguilar, J. C. Nunez-Perez, F. J. Perez-Pinal, E. Tlelo-Cuautle
DOI
FPGA-based design and implementation of a phase detector to correct the I/Q imbalance
Thaimi Niubo-Aleman, Jose Ricardo Cardenas-Valdez, Jose Alejandro Galaviz-Aguilar, J. Apolinar Reynoso-Hernandez, Manuel de Jesus Garcia-Ortega, Jose Cruz Nunez-Perez
DOI