Jose Alejandro Galaviz-Aguilar
Jose Alejandro Galaviz-Aguilar
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FPGA-Based Digital Lock-In Amplifier with Signal Enhancement
Designed and verified an FPGA-based lock-in amplifier system with comprehensive noise analysis, published in IEEE Embedded Systems Letters and Sensors.
Last updated on May 20, 2026
1 min read
IEEE ESL Paper
Sensors Review Paper
FPGA-Based Digital Lock-In Amplifier with Signal Enhancement
Designed and verified an FPGA-based lock-in amplifier system with comprehensive noise analysis, published in IEEE Embedded Systems Letters and Sensors.
IEEE ESL Paper
Sensors Review Paper
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